奎芯科技
M SQUARE
奎芯科技（M SQUARE）于2021年在上海注册成立，是一家专业的集成电路IP和Chiplet产品供应商。我们致力于解决智慧经济时代，芯片互联和应用垂直整合问题。目前在上海，合肥，北京，成都，无锡五地拥有办公室，员工超150人，研发人员比例80%。于2023年1月获得A轮超亿元投资，奎芯致力于提供新的国产化选型方案，从IP到Chiplet，加速推动产业国产化进程。
奎芯科技旨在打造国际芯粒品牌，成就芯片互联龙头。奎芯科技的IP已经成功在一些知名厂商的工艺节点得到验证并实现量产。公司目前已成功开发6nm到180nm, 覆盖多个晶圆厂超过400多个不同制程节点的IP。奎芯科技的研发团队已陆续推出LPDDR、PCle 、SerDes 、MIPI 、USB 、HDMI 、DP、HBM等互联接口IP，以M2LINK为代表的Chiplet产品解决方案，赋能中国的数字化转型。
M SQUARE was incorporated in Shanghai in 2021 as an integrated circuit IP and Chiplet vendor, dedicated to solving the problem of computing power scaling and high-speed interconnection in the era of smart economy. So far, M SQUSRE has its offices in Shanghai, Hefei, Beijing, Chengdu and Wuxi, with over 150 employees, which 80% of them are R&D members and the proportion of master's and doctoral degrees exceeds 60%. In January 2023, M SQUARE raises over CNY 100 million in Series A funding round. M SQUARE's core mission is to offer cutting-edge localization solutions, spanning from IP to Chiplet, thereby catalyzing the advancement of the domestic industry.
产品展示
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LPDDR5X IP
1，Compatible with JEDEC standard LPDDR4X , LPDDR5 and LPDDR5X SDRAMs,
2，Support for data rates up to 8533 Mbps
3，ONFI5.0 for PHY and Controller interface
4，Support PHY independent training mode by Processor,
5，Support Data Bus Inversion(DBI) mod
6，Support 4 trained frequencies -
D2D IP
1，Compatible with UCIe v1.0 specification；
2，Single-ended, source synchronous and DDR IO Signaling
3，Support 32 bits(16bits TX + 16bits RX) data bus per module for standard package,
4，High clock frequency, up to 8GHz
5，16 Gbps/lane data rate
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ONFI 5.1 PHY IP
1，Compliant to ONFI 5.1 specification,
2，Support NV-DDR3/NV-LPDDR4,and max rate up to 3600MT/s
3，Support Matched or Un-matched DQS
4，Support WDCA/Per-Pin VREFQ Training for NAND Device,
5，Support WT Monitor
6，Support Separate Command Address [SCA] to improve NAND IO efficiency